PPC MP+lwsync+addr "LwSyncdWW Rfe DpAddrdR Fre" Cycle=Rfe DpAddrdR Fre LwSyncdWW { 0:r2=x; 0:r4=y; 1:r2=y; 1:r5=x; 1:r6=2; } P0 | P1 ; li r1,1 | lwz r1,0(r2) ; stw r1,0(r2) | xor r3,r1,r1 ; lwsync | lwzx r4,r3,r5 ; li r3,1 | stw r6,0(r4) ; stw r3,0(r4) | ; exists (1:r1=1 /\ 1:r4=0)