From: Brian Gerst Use an alignment attribute on the stack member of struct tss_struct instead of padding. Also mark the limit of the TSS segment. Signed-off-by: Andrew Morton --- 25-akpm/include/asm-i386/desc.h | 2 +- 25-akpm/include/asm-i386/processor.h | 7 ++----- 2 files changed, 3 insertions(+), 6 deletions(-) diff -puN include/asm-i386/desc.h~explicity-align-tss-stack include/asm-i386/desc.h --- 25/include/asm-i386/desc.h~explicity-align-tss-stack 2004-09-06 14:28:06.797172056 -0700 +++ 25-akpm/include/asm-i386/desc.h 2004-09-06 14:28:06.802171296 -0700 @@ -47,7 +47,7 @@ __asm__ __volatile__ ("movw %w3,0(%2)\n\ static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr) { _set_tssldt_desc(&per_cpu(cpu_gdt_table, cpu)[entry], (int)addr, - offsetof(struct tss_struct, __cacheline_filler) - 1, 0x89); + offsetof(struct tss_struct, tss_limit) - 1, 0x89); } #define set_tss_desc(cpu,addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr) diff -puN include/asm-i386/processor.h~explicity-align-tss-stack include/asm-i386/processor.h --- 25/include/asm-i386/processor.h~explicity-align-tss-stack 2004-09-06 14:28:06.798171904 -0700 +++ 25-akpm/include/asm-i386/processor.h 2004-09-06 14:28:06.803171144 -0700 @@ -392,18 +392,15 @@ struct tss_struct { * be within the limit. */ unsigned long io_bitmap[IO_BITMAP_LONGS + 1]; + unsigned long tss_limit[0]; /* * Effective size of the currently set I/O bitmap. */ unsigned long map_size; /* - * pads the TSS to be cacheline-aligned (size is 0x100) - */ - unsigned long __cacheline_filler[36]; - /* * .. and then another 0x100 bytes for emergency kernel stack */ - unsigned long stack[64]; + unsigned long stack[64] __attribute__((aligned(0x100))); } __attribute__((packed)); #define ARCH_MIN_TASKALIGN 16 _