Vector Optimized Library of Kernels  2.4
Architecture-tuned implementations of math kernels
cpuinfo_aarch64.h
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1 // Copyright 2017 Google LLC
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 #ifndef CPU_FEATURES_INCLUDE_CPUINFO_AARCH64_H_
16 #define CPU_FEATURES_INCLUDE_CPUINFO_AARCH64_H_
17 
19 #include "cpu_features_macros.h"
20 
22 
23 typedef struct {
24  int fp : 1; // Floating-point.
25  int asimd : 1; // Advanced SIMD.
26  int evtstrm : 1; // Generic timer generated events.
27  int aes : 1; // Hardware-accelerated Advanced Encryption Standard.
28  int pmull : 1; // Polynomial multiply long.
29  int sha1 : 1; // Hardware-accelerated SHA1.
30  int sha2 : 1; // Hardware-accelerated SHA2-256.
31  int crc32 : 1; // Hardware-accelerated CRC-32.
32  int atomics : 1; // Armv8.1 atomic instructions.
33  int fphp : 1; // Half-precision floating point support.
34  int asimdhp : 1; // Advanced SIMD half-precision support.
35  int cpuid : 1; // Access to certain ID registers.
36  int asimdrdm : 1; // Rounding Double Multiply Accumulate/Subtract.
37  int jscvt : 1; // Support for JavaScript conversion.
38  int fcma : 1; // Floating point complex numbers.
39  int lrcpc : 1; // Support for weaker release consistency.
40  int dcpop : 1; // Data persistence writeback.
41  int sha3 : 1; // Hardware-accelerated SHA3.
42  int sm3 : 1; // Hardware-accelerated SM3.
43  int sm4 : 1; // Hardware-accelerated SM4.
44  int asimddp : 1; // Dot product instruction.
45  int sha512 : 1; // Hardware-accelerated SHA512.
46  int sve : 1; // Scalable Vector Extension.
47  int asimdfhm : 1; // Additional half-precision instructions.
48  int dit : 1; // Data independent timing.
49  int uscat : 1; // Unaligned atomics support.
50  int ilrcpc : 1; // Additional support for weaker release consistency.
51  int flagm : 1; // Flag manipulation instructions.
52  int ssbs : 1; // Speculative Store Bypass Safe PSTATE bit.
53  int sb : 1; // Speculation barrier.
54  int paca : 1; // Address authentication.
55  int pacg : 1; // Generic authentication.
56  int dcpodp : 1; // Data cache clean to point of persistence.
57  int sve2 : 1; // Scalable Vector Extension (version 2).
58  int sveaes : 1; // SVE AES instructions.
59  int svepmull : 1; // SVE polynomial multiply long instructions.
60  int svebitperm : 1; // SVE bit permute instructions.
61  int svesha3 : 1; // SVE SHA3 instructions.
62  int svesm4 : 1; // SVE SM4 instructions.
63  int flagm2 : 1; // Additional flag manipulation instructions.
64  int frint : 1; // Floating point to integer rounding.
65  int svei8mm : 1; // SVE Int8 matrix multiplication instructions.
66  int svef32mm : 1; // SVE FP32 matrix multiplication instruction.
67  int svef64mm : 1; // SVE FP64 matrix multiplication instructions.
68  int svebf16 : 1; // SVE BFloat16 instructions.
69  int i8mm : 1; // Int8 matrix multiplication instructions.
70  int bf16 : 1; // BFloat16 instructions.
71  int dgh : 1; // Data Gathering Hint instruction.
72  int rng : 1; // True random number generator support.
73  int bti : 1; // Branch target identification.
74 
75  // Make sure to update Aarch64FeaturesEnum below if you add a field here.
77 
78 typedef struct {
81  int variant;
82  int part;
83  int revision;
84 } Aarch64Info;
85 
87 
89 // Introspection functions
90 
91 typedef enum {
144 
145 int GetAarch64FeaturesEnumValue(const Aarch64Features* features,
146  Aarch64FeaturesEnum value);
147 
149 
151 
152 #if !defined(CPU_FEATURES_ARCH_AARCH64)
153 #error "Including cpuinfo_aarch64.h from a non-aarch64 target."
154 #endif
155 
156 #endif // CPU_FEATURES_INCLUDE_CPUINFO_AARCH64_H_
#define CPU_FEATURES_START_CPP_NAMESPACE
Definition: cpu_features_macros.h:114
#define CPU_FEATURES_END_CPP_NAMESPACE
Definition: cpu_features_macros.h:115
Aarch64FeaturesEnum
Definition: cpuinfo_aarch64.h:91
@ AARCH64_SHA512
Definition: cpuinfo_aarch64.h:113
@ AARCH64_SVEBF16
Definition: cpuinfo_aarch64.h:136
@ AARCH64_ASIMD
Definition: cpuinfo_aarch64.h:93
@ AARCH64_ILRCPC
Definition: cpuinfo_aarch64.h:118
@ AARCH64_SHA1
Definition: cpuinfo_aarch64.h:97
@ AARCH64_PACG
Definition: cpuinfo_aarch64.h:123
@ AARCH64_CRC32
Definition: cpuinfo_aarch64.h:99
@ AARCH64_SVEPMULL
Definition: cpuinfo_aarch64.h:127
@ AARCH64_FRINT
Definition: cpuinfo_aarch64.h:132
@ AARCH64_SVEAES
Definition: cpuinfo_aarch64.h:126
@ AARCH64_FLAGM
Definition: cpuinfo_aarch64.h:119
@ AARCH64_LRCPC
Definition: cpuinfo_aarch64.h:107
@ AARCH64_FPHP
Definition: cpuinfo_aarch64.h:101
@ AARCH64_RNG
Definition: cpuinfo_aarch64.h:140
@ AARCH64_PMULL
Definition: cpuinfo_aarch64.h:96
@ AARCH64_ATOMICS
Definition: cpuinfo_aarch64.h:100
@ AARCH64_JSCVT
Definition: cpuinfo_aarch64.h:105
@ AARCH64_SVEBITPERM
Definition: cpuinfo_aarch64.h:128
@ AARCH64_BF16
Definition: cpuinfo_aarch64.h:138
@ AARCH64_CPUID
Definition: cpuinfo_aarch64.h:103
@ AARCH64_SVE2
Definition: cpuinfo_aarch64.h:125
@ AARCH64_SVESHA3
Definition: cpuinfo_aarch64.h:129
@ AARCH64_ASIMDDP
Definition: cpuinfo_aarch64.h:112
@ AARCH64_ASIMDRDM
Definition: cpuinfo_aarch64.h:104
@ AARCH64_SM4
Definition: cpuinfo_aarch64.h:111
@ AARCH64_AES
Definition: cpuinfo_aarch64.h:95
@ AARCH64_SVEI8MM
Definition: cpuinfo_aarch64.h:133
@ AARCH64_SHA3
Definition: cpuinfo_aarch64.h:109
@ AARCH64_SVESM4
Definition: cpuinfo_aarch64.h:130
@ AARCH64_DGH
Definition: cpuinfo_aarch64.h:139
@ AARCH64_SSBS
Definition: cpuinfo_aarch64.h:120
@ AARCH64_USCAT
Definition: cpuinfo_aarch64.h:117
@ AARCH64_SVEF64MM
Definition: cpuinfo_aarch64.h:135
@ AARCH64_SHA2
Definition: cpuinfo_aarch64.h:98
@ AARCH64_ASIMDFHM
Definition: cpuinfo_aarch64.h:115
@ AARCH64_LAST_
Definition: cpuinfo_aarch64.h:142
@ AARCH64_PACA
Definition: cpuinfo_aarch64.h:122
@ AARCH64_I8MM
Definition: cpuinfo_aarch64.h:137
@ AARCH64_DCPOP
Definition: cpuinfo_aarch64.h:108
@ AARCH64_DCPODP
Definition: cpuinfo_aarch64.h:124
@ AARCH64_FLAGM2
Definition: cpuinfo_aarch64.h:131
@ AARCH64_FP
Definition: cpuinfo_aarch64.h:92
@ AARCH64_SVEF32MM
Definition: cpuinfo_aarch64.h:134
@ AARCH64_SB
Definition: cpuinfo_aarch64.h:121
@ AARCH64_SM3
Definition: cpuinfo_aarch64.h:110
@ AARCH64_FCMA
Definition: cpuinfo_aarch64.h:106
@ AARCH64_DIT
Definition: cpuinfo_aarch64.h:116
@ AARCH64_BTI
Definition: cpuinfo_aarch64.h:141
@ AARCH64_SVE
Definition: cpuinfo_aarch64.h:114
@ AARCH64_EVTSTRM
Definition: cpuinfo_aarch64.h:94
@ AARCH64_ASIMDHP
Definition: cpuinfo_aarch64.h:102
int GetAarch64FeaturesEnumValue(const Aarch64Features *features, Aarch64FeaturesEnum value)
Definition: cpuinfo_aarch64.c:141
Aarch64Info GetAarch64Info(void)
Definition: cpuinfo_aarch64.c:121
const char * GetAarch64FeaturesEnumName(Aarch64FeaturesEnum)
Definition: cpuinfo_aarch64.c:147
Definition: cpuinfo_aarch64.h:23
int jscvt
Definition: cpuinfo_aarch64.h:37
int bf16
Definition: cpuinfo_aarch64.h:70
int asimddp
Definition: cpuinfo_aarch64.h:44
int sm3
Definition: cpuinfo_aarch64.h:42
int svesha3
Definition: cpuinfo_aarch64.h:61
int dit
Definition: cpuinfo_aarch64.h:48
int uscat
Definition: cpuinfo_aarch64.h:49
int pacg
Definition: cpuinfo_aarch64.h:55
int asimdhp
Definition: cpuinfo_aarch64.h:34
int rng
Definition: cpuinfo_aarch64.h:72
int flagm
Definition: cpuinfo_aarch64.h:51
int flagm2
Definition: cpuinfo_aarch64.h:63
int lrcpc
Definition: cpuinfo_aarch64.h:39
int ilrcpc
Definition: cpuinfo_aarch64.h:50
int dcpodp
Definition: cpuinfo_aarch64.h:56
int sha512
Definition: cpuinfo_aarch64.h:45
int svebitperm
Definition: cpuinfo_aarch64.h:60
int sha2
Definition: cpuinfo_aarch64.h:30
int sm4
Definition: cpuinfo_aarch64.h:43
int bti
Definition: cpuinfo_aarch64.h:73
int sha3
Definition: cpuinfo_aarch64.h:41
int asimd
Definition: cpuinfo_aarch64.h:25
int sve
Definition: cpuinfo_aarch64.h:46
int evtstrm
Definition: cpuinfo_aarch64.h:26
int crc32
Definition: cpuinfo_aarch64.h:31
int dcpop
Definition: cpuinfo_aarch64.h:40
int sha1
Definition: cpuinfo_aarch64.h:29
int cpuid
Definition: cpuinfo_aarch64.h:35
int fcma
Definition: cpuinfo_aarch64.h:38
int sb
Definition: cpuinfo_aarch64.h:53
int ssbs
Definition: cpuinfo_aarch64.h:52
int pmull
Definition: cpuinfo_aarch64.h:28
int aes
Definition: cpuinfo_aarch64.h:27
int svei8mm
Definition: cpuinfo_aarch64.h:65
int asimdfhm
Definition: cpuinfo_aarch64.h:47
int svef32mm
Definition: cpuinfo_aarch64.h:66
int atomics
Definition: cpuinfo_aarch64.h:32
int svepmull
Definition: cpuinfo_aarch64.h:59
int svef64mm
Definition: cpuinfo_aarch64.h:67
int dgh
Definition: cpuinfo_aarch64.h:71
int asimdrdm
Definition: cpuinfo_aarch64.h:36
int sve2
Definition: cpuinfo_aarch64.h:57
int sveaes
Definition: cpuinfo_aarch64.h:58
int paca
Definition: cpuinfo_aarch64.h:54
int svesm4
Definition: cpuinfo_aarch64.h:62
int fp
Definition: cpuinfo_aarch64.h:24
int svebf16
Definition: cpuinfo_aarch64.h:68
int fphp
Definition: cpuinfo_aarch64.h:33
int frint
Definition: cpuinfo_aarch64.h:64
int i8mm
Definition: cpuinfo_aarch64.h:69
Definition: cpuinfo_aarch64.h:78
int implementer
Definition: cpuinfo_aarch64.h:80
int revision
Definition: cpuinfo_aarch64.h:83
int part
Definition: cpuinfo_aarch64.h:82
int variant
Definition: cpuinfo_aarch64.h:81
Aarch64Features features
Definition: cpuinfo_aarch64.h:79