module Iterator:sig
..end
val signal_abort : unit -> unit
Mark the analysis as aborted. It will be stopped at the next safe point
module Computer:functor (
Abstract
:
Abstractions.Eva
) ->
functor (
States
:
Powerset.S
with type state = Abstract.Dom.t
) ->
functor (
Transfer
:
Transfer_stmt.S
with type state = Abstract.Dom.t and type value = Abstract.Val.t
) ->
functor (
Init
:
Initialization.S
with type state := Abstract.Dom.t
) ->
functor (
Logic
:
Transfer_logic.S
with type state = Abstract.Dom.t and type states = States.t
) ->
functor (
Spec
:
sig
val treat_statement_assigns :Cil_types.assigns -> Abstract.Dom.t -> Abstract.Dom.t
end
) ->
sig
..end