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19 if(op_type.
id()!=ID_verilog_signedbv ||
20 op_type.
id()!=ID_verilog_unsignedbv)
23 (expr.
type().
id() == ID_verilog_signedbv ||
24 expr.
type().
id() == ID_verilog_unsignedbv) &&
#define CHECK_RETURN(CONDITION)
The type of an expression, extends irept.
std::vector< literalt > bvt
typet & type()
Return the type of the expression.
void conversion_failed(const exprt &expr, bvt &bv)
literalt const_literal(bool value)
const irep_idt & id() const
virtual const bvt & convert_bv(const exprt &expr, const optionalt< std::size_t > expected_width=nullopt)
Convert expression to vector of literalts, using an internal cache to speed up conversion if availabl...
std::size_t get_width() const
bvt verilog_bv_normal_bits(const bvt &)
virtual bvt convert_not(const not_exprt &expr)
literalt is_zero(const bvt &op)
virtual literalt lselect(literalt a, literalt b, literalt c)=0
literalt verilog_bv_has_x_or_z(const bvt &)
const bitvector_typet & to_bitvector_type(const typet &type)
Cast a typet to a bitvector_typet.